This invention is directed to semiconductor devices and methods of making such device, and more particularly to an improved resistor element in MOS integrated circuits.
In early semiconductor integrated circuits, resistors were provided by diffused regions or by portions of the semiconductor substrate which were defined by etching, as seen in U.S. Pat. No. 3,138,743 issued to Jack S. Kilby and assigned to Texas Instruments. As the density of components in integrated circuits grew, the area occupied by resistors became prohibitive, so logic forms were favored which used few resistors or no resistors. For example, "TTL" or transistor-transistor logic and I.sup.2 L or integrated injection logic in bipolar technology had features minimizing the area on a bar dedicated to resistors. In MOS logic and memories, transistors are used as load devices in place of resistors. Examples of every complex MOS circuits containing many thousands of transistors but no resistors in a single chip digital processor or memory are shown in U.S. Pat. No. 3,940,747, issued to Kuo and Kitagawa, U.S. Pat. No. 4,050,061, issued to Kitagawa, and U.S. Pat. No. 3,998,604, issured to J. H. Raymond, Jr., all assigned to Texas Instruments. High density MOS memory devices such as the 4096 and 16384 bit memories described in U.S. Pat. Nos. 3,940,747 and 4,050,061, have been of the dynamic type because dynamic one-transistor cells are the smallest in area.
In some parts of digital equipment, however, the refresh circuitry required for dynamic memories is incompatible or undesirable, so static memory is preferred. Static cells traditionally employ six-transistor bistable circuits wherein depletion-load MOS transistors are used as load devices. These cells are much larger than the one-transistor cells of dynamic memory devices, so the density is less. Also, power dissipation is high due to the requirement that some current must flow through one side of each cell in the array to maintain the stored data.
In copending application Ser. No. 691,252, filed May 28, 1976 by G. R. Mohan Rao, assigned to Texas Instruments, now U.S. Pat. No. 4,246,692, disclosed a resistor element particularly for a static RAM cell wherein the resistors are implanted regions buried beneath field oxide. In application Ser. No. 727,116, filed Sept. 27, 1976 by Rao, Stanczak, Lien and Bhatia, assigned to Texas Instruments, now U.S. Pat. No. 4,110,776 a static cell using implanted resistors in polycrystalline silicon over field oxide is described. Implanted resistors in second level polysilicon are disclosed in copending application Ser. No. 801,699, filed May 31, 1977 by J. H. Raymond, Jr., now U.S. Pat. No. 4,209,716, assigned to Texas Instruments. While these inventions represent marked improvements, further reduction in cell size is needed for highly dense arrays. For example, memory arrays of 64K have been built, and 256K chips are being designed.
It is a principal object of this invention to provide improved resistor elements in integrated circuits. Another object is to provide improved small area resistors for MOS devices of high density. An additional object is to provide small area, high resistance resistors which may be used as load elements for transistors in semiconductor integrated circuits.